Onur Mutlu is a Professor of Computer Science at ETH Zurich. He previously held the William D. and Nancy W. Strecker Early Career Professorship at Carnegie Mellon University and was a Visiting Professor at Stanford University. He started the Computer Architecture Group at Microsoft Research (2006-2009) before joining CMU. He has held product, research and consulting/visiting positions at various companies, including Intel Corporation, Advanced Micro Devices, VMware, Google. He has performed significant consulting work for various companies and institutions. Many techniques Onur, with his group and collaborators, has invented over the years have largely influenced industry and have been widely employed in commercial microprocessors and memory & storage systems (including both DRAM and NAND flash memories and controllers, as well as microprocessor and accelerator memory hierarchies) used daily by hundreds of millions of people.

Marc Greenberg is an independent consultant in memory, semiconductor and IP. Marc currently serves as VP of Product for Cassia.ai, an AI IP company, as vice-chair of an undisclosed task group at JEDEC, and as advisor to several other companies. Marc was responsible for product management of HBM and other memory and storage IP products at Denali, Cadence and Synopsys for 20 years out of a 30-year career in semiconductor and IP. Marc has a master's degree in Electronics from the University of Edinburgh in Scotland.

Mr. Gervasi has nearly 5 decades of experience in high speed memory subsystem definition, design, and product development. He piloted the definition of Double Data Rate SDRAM since its earliest inception, authoring the first standard specification, and created the Automotive SSD standard. With MPS, Bill is driving some of the memory and storage system management mechanisms for a post-quantum world. He received the JEDEC Technical Excellence award, their highest honor, in 2020.

Rory joined KIOXIA America in 2017. He has founded, built teams, and delivered product at four storage startups which were acquired ($400M, $165M and two undisclosed). Rory has more than 25 years of experience in data storage systems, data protection systems, and high-performance computing with tenures as VP Software Engineering at Samsung, Technical Director/CTO Counsel at NetApp, CTO Counsel at EMC, VP, Chief Storage Architect, and Distinguished Fellow at Quantum. Rory has been granted over 12 storage related patents and has several pending. Rory has a BS in Computer Engineering from UCSD.

Onur Mutlu is a Professor of Computer Science at ETH Zurich. He previously held the William D. and Nancy W. Strecker Early Career Professorship at Carnegie Mellon University and was a Visiting Professor at Stanford University. He started the Computer Architecture Group at Microsoft Research (2006-2009) before joining CMU. He has held product, research and consulting/visiting positions at various companies, including Intel Corporation, Advanced Micro Devices, VMware, Google. He has performed significant consulting work for various companies and institutions. Many techniques Onur, with his group and collaborators, has invented over the years have largely influenced industry and have been widely employed in commercial microprocessors and memory & storage systems (including both DRAM and NAND flash memories and controllers, as well as microprocessor and accelerator memory hierarchies) used daily by hundreds of millions of people.

Shimeng Yu is the endowed Dean’s Professor of Electrical and Computer Engineering at the Georgia Institute of Technology. He received a PhD degree from Stanford University in 2013. He is elevated for the IEEE Fellow for contributions to non-volatile memories and in-memory computing. His 400+ publications received 33,000+ citations (Google Scholar) with H-index 83. He serves flagship conferences in the semiconductor field as technical program committee, such as IEEE International Electron Devices Meeting (IEDM), IEEE Symposium on VLSI Technology and Circuits, etc. Among Prof. Yu’s honors, he was a recipient of National Science Foundation (NSF) CAREER Award in 2016, IEEE Electron Devices Society (EDS) Early Career Award in 2017, ACM Special Interests Group on Design Automation (SIGDA) Outstanding New Faculty Award in 2018, Semiconductor Research Corporation (SRC) Inaugural Young Faculty Award in 2019, IEEE Circuits and Systems Society (CASS) Distinguished Lecturer in 2021, IEEE Electron Devices Society (EDS) Distinguished Lecturer in 2022, and Intel Outstanding Researcher Award in 2023, etc. He is the author of the textbook of Semiconductor Memory Devices and Circuits.

Mr. Gervasi has nearly 5 decades of experience in high speed memory subsystem definition, design, and product development. He piloted the definition of Double Data Rate SDRAM since its earliest inception, authoring the first standard specification, and created the Automotive SSD standard. With MPS, Bill is driving some of the memory and storage system management mechanisms for a post-quantum world. He received the JEDEC Technical Excellence award, their highest honor, in 2020.

Dr. Chris J. Newburn, who goes by CJ, is a Distinguished Engineer who drives industry-wide initiatives like Storage-Next, HPC strategy and the SW IO product roadmap in NVIDIA Compute Software, with a special focus on data center architecture and security, storage and network IO, systems, and programming models for scale. He is a community builder with a passion for extending the core capabilities of hardware and software platforms from HPC into AI, data science, and visualization. He's delighted to have worked on volume products that his Mom used and that help researchers do their life's work in science that previously wasn't possible.